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exar corporation, 48720 kato road, fremont, ca 94538 (510) 668-7000 fax (510) 668-7017 rev. 1.0.0 XRT59L91 single-chip e1 line interface unit october 1999-1 features l complete e1 (cept) line interface unit (transmitter and receiver) l generates transmit output pulses that are compliant with the itu-t g.703 pulse template for 2.048mbps (e1) rates l on-chip pulse shaping for both 75 w and 120 w line drivers l receiver can either be transformer or capaci- tively-coupled to the line l detects and clears los (loss of signal) per itu-t g.775 l compliant with the itu-t g.823 jitter tolerance requirements l compliant with the itu-t g.703 eos over- voltage protection requirements general description the XRT59L91 is an optimized single-chip analog e1 line interface unit (liu) fabricated using low power, 3.3v cmos technology. the liu ic consists of both a transmitter and a receiver function. the transmit- ter accepts a ttl or cmos level signal from the terminal equipment; and outputs this data to the line via bipolar pulses that are compliant to the itu-t g.703 pulse template for e1. the receiver accepts an attenuated bipolar line signal (from the remote terminal equipment) and outputs this data to the (near-end) terminal equipment via cmos level signals. ordering information part no. package operating temperature range XRT59L91id 16 ld jedec soic (300 mil) -40c to +85c l supports both local- and remote-loop back operations l logic inputs accept either 3.3v or 5.0v levels l operates over the industrial temperature range l ultra low power dissipation l +3.3v supply operation applications l pdh multiplexers l sdh multiplexers l digital cross-connect systems l dect (digital european cordless telephone) base stations l csu/dsu equipment. l test equipment the receiver input can be transformer or capacitively- coupled to the line. the receiver input is transformer- coupled to the line, using the 2:1 step-down trans- former. the transmitter is coupled to the line using a 1:2 step-up transformer. this same configuration is applicable for both balanced (120 w ) and unbalanced (75 w ) interfaces.
XRT59L91 2 rev. 1.0.0 figure 1. XRT59L91 block diagram transmit input interfac e transmit input interface pulse shaping circui t pulse shaping circuit recei ve equaliz er receive equalizer peak detector/ slice r peak detector/ slicer receive output interfac e receive output interface los detect or los detector loca l loop back mux local loop back mux remot e loop back mux remote loop back mux ttip tring txpos txneg rtip rring rloop lloop rxpos rxneg rxlos txclk
XRT59L91 3 rev. 1.0.0 pin configuration 1 9 8 16 txclk txpos tvss txneg lloop rloop rxpos rxneg rxlos tring tvdd ttip rvdd rvss rring rtip pin description pin# symbol type description 1 txclk i transmitter clock input: if the user operates the liu in the clocked mode, then the transmit section of the liu will use the falling edge of this signal to sample the data at the txpos and txneg input pins. note: if the user operates the liu in the clockless mode, then the terminal equipment should not apply a clock signal to this input pin. 2 txpos i transmit C positive data input: the exact signal that should be applied to this input pin depends upon whether the user intends to operate the transmit section (of the device) in the clocked or clockless mode. clocked mode - the terminal equipment should apply bit-wide nrz pulses on this input pin, whenever the terminal equipment needs to transmit a positive- polarity pulse onto the line via ttip and tring output pins. the XRT59L91 device will sample this input pin upon the falling edge of the tclk signal. clockless mode - the terminal equipment should apply rz pulses to this input pin, anytime the terminal equipment needs to transmit a positive-polarity pulse onto the line via ttip and tring output pins.
XRT59L91 4 rev. 1.0.0 pin description pin# symbol type description 3 txneg i transmit C negative data input: the exact signal that should be applied to this input pin depends upon whether the user intends to operate the transmit section (of the device) in the clocked or clockless mode. clocked mode - the terminal equipment should apply bit-wide nrz pulses on this input pin, whenever the terminal equipment needs to transmit a negative-polarity pulse onto the line via ttip and tring output pins. the XRT59L91 device will sample this input pin upon the falling edge of the tclk signal. clockless mode - the terminal equipment should apply rz pulses to this input pin, anytime the terminal equipment needs to transmit a negative- polarity pulse onto the line via ttip and tring output pins. 4 lloop i local loopback input select: this input pin permits the user to configure the XRT59L91 device to operate in the local loopback mode; in order to support diagnostic operations. when the XRT59L91 device is operating in the local loopback mode, then ttip and tring output signals will be (internally) routed to rtip and rring input signals. setting this input pin high configures the XRT59L91 device to operate in the local loopback mode. setting this input pin low configures the XRT59L91 device to operate in the normal mode. note: pulling both the lloop and rloop input pins to vdd, simultaneously, will cause the XRT59L91 device to operate in the in- circuit test mode. in this mode, all output pins will be tri-stated. 5 rloop i remote loopback input select: this input pin permits the user to configure the XRT59L91 device to operate in the remote loopback mode; in order to support diagnos- tic operations. when the XRT59L91 device is operating in the remote loopback mode, then the rxpos and rxneg output pins will be (internally) routed to the txpos and txneg input pins. setting this input pin high configures the XRT59L91 device to operate in the remote loopback mode. setting this input pin low configures the XRT59L91 device to operate in the normal mode. note: pulling both the lloop and rloop input pins to vdd, simultaneously, will cause the XRT59L91 device to operate in the in- circuit test mode. in this mode, all output pins will be tri-stated.
XRT59L91 5 rev. 1.0.0 pin description pin# symbol type description 6 rxpos o receive positive pulse output: this output pin will pulse high whenever the XRT59L91 device has received a positive polarity pulse, in the incoming line signal, at rtip/rring inputs. 7 rxneg o receive negative pulse output: this output pin will pulse high whenever the XRT59L91 device has received a negative polarity pulse, in the incoming line signal, at rtip/rring inputs. 8 rxlos o receive loss of signal output indicator: this output pin toggles high if the XRT59L91 device has detected a loss of signal condition in the incoming line signal. 9 rtip i receive tip input: this input pin, along with rring is used to receive the bipolar line signal from the remote e1 terminal. 10 rring i receive ring input: this input pin, along with rtip is used to receive the bipolar line signal from the remote e1 terminal. 11 rvss - receiver ground pin 12 rvdd - receiver power supply pin: 3.3v + 5% 13 ttip o transmit tip output: the XRT59L91 device will use this pin, along with tring, to transmit a bipolar line signal, via a 1:2 step-up transformer. 14 tvdd - transmitter power supply pin : 3.3v + 5% 15 tring o transmit ring output: the XRT59L91 device will use this pin, along with ttip, to transmit a bipolar line signal, via a 1:2 step-up transformer. 16 tvss - transmitter ground pin
XRT59L91 6 rev. 1.0.0 ac electrical characteristics 25c unless otherwise specified: t a = v dd =3.3v5%, unless otherwise specified. dc electrical characteristics 25c unless otherwise specified: t a =-, v dd =3.3v5%, unless otherwise specified. parameter symbol min typ max unit power supply voltage v dd 3.13 3.3 3.46 v input high voltage v ih 2.0 - 5.0 v input low voltage v il -0.5 - 0.8 v output high voltage @ i oh = -4ma v oh 2.4 - - v output low voltage @ i ol = 4ma v ol - - 0.4 v input leakage current (except input pins with pull-up resistor i l - - 10 m a input capacitance ci - 5.0 - pf output load capacitance c l -- 25pf power consumption including the line power dissipation, tranmission and receive paths all active unless otherwise specified: t a =-40 to 85c, v dd =3.3v5%, unless otherwise specified. parameter symbol min typ max unit conditions power consumption pc - 130 145 mw 75 w load, operating at 50% mark density power consumption pc - 115 130 mw 120 w load, operating at 50% mark density power consumption pc - 170 185 mw 75 w load, operating at 100% mark density power consumption pc - 140 155 mw 120 w load, operating at 100% mark density power consumption pc - 25 30 mw transmitter in powered- down mode parameter symbol min typ max unit tclk clock period t1 - 488 - ns tclk duty cycle t2 47 50 53 % transmit data setup time tsu 50 - - ns transmit data hold time tho 30 - -ns transmit data prop. delay time t3 - rz data mode - 50 - ns - nrz data mode (clock mode) - 50 - ns tclk rise time(10%/90%) tr - - 40 ns tclk fall time(90%/10%) tf - - 40 ns receive data rise time rtr - - 40 ns receive data fall time rtf - - 40 ns receive data prop. delay rpd - 160 - ns receive data pulse width rxpw 210 244 450 ns
XRT59L91 7 rev. 1.0.0 receiver electrical characteristics t a =-40 to 85c, v dd =3.3v5%, unless otherwise specified. parameter min typ max unit test conditions receiver loss of signal: threshold to assert 12 20 - db cable attenuation @ 1024khz threshold to clear 11 15 db time delay 10 - 255 bit per itu-g.775 hysteresis - 5 - db receiver sensitivity 11 13 - db below nominal pulse amplitude of 3.0v for 120 w and 2.37v for 75 w applications. with -18db interference signal added. interference margin -18 -14 - db with 6db cable loss input impedance - 5 - k w jitter tolerance: 20hz 10 700hz 5 - - uipp 10khz 100khz 0.3 return loss: 51khz 102khz 14 - - db 102khz2048khz 20 - - db per itu-g.703 2048khz3072khz 16 - - db transmitter electrical characteristics t a =-40 to 85c, v dd =3.3v5%, unless otherwise specified. parameter min typ max unit test conditions ami output pulse amplitude: 75 w application 2.13 2.37 2.60 v use transformer with 1:2 ratio 120 w application 2.70 3.00 3.30 and 9.1 w resistor in series with each end of primary. output pulse width 224 244 264 ns output pulse width ratio 0.95 1.00 1.05 - per itu-g.703 output pulse amplitude ratio 0.95 1.00 1.05 - per itu-g.703 output return loss: 51khz 102khz 10 - - db 102khz2048khz 16 - - db per etsi 300 166 and ch ptt 2048khz3072khz 12 - - db absolute maximum ratings storage temperature -65c to + 150c operating temperature -40c to + 85c supply voltage -0.5v to + 6.0v
XRT59L91 8 rev. 1.0.0 system description the XRT59L91 device is a single channel e1 trans- ceiver that provides an electrical interface for 2.048mbps applications. XRT59L91 includes a receive circuit that converts an itu-t g.703 compliant bipolar signal into a ttl compatible logic levels. each receiver also includes an los (loss of signal) detection circuit. similarly, in the transmit direction, the transmitter converts ttl compatible logic levels into a g.703 compatible bipolar signal. the transmitter may be operated in either a clocked or clockless mode. the XRT59L91 device consists of both a transmit section and a receive section; each of these sections will be discussed in detail below. 1.0 the transmit section in general, the purpose of the transmit section (within the XRT59L91 device) is to accept ttl/cmos level digital data (from the terminal equipment), and to encode it into a format such that it can: 1. be efficiently transmitted over coaxial- or twisted- pair cable at the e1 data rate; and 2. be reliably received by the remote terminal equipment at the other end of the e1 data link. 3. comply with the itu-t g.703 pulse template requirements, for e1 applications. the circuitry that the transmit section (within the XRT59L91 device) uses to accomplish this goal is discussed below. the transmit section of the XRT59L91 device consists of the following blocks: l transmit input interface l pulse shaping block 1.1 the transmit input interface the transmit input interface accepts either clocked or clockless data from the terminal equipment. the manner in which the terminal equipment should apply data to the XRT59L91 device depends upon whether the device is being operated in the clocked or clockless mode. 1.2.1 operating the transmitter in the clocked mode the user can configure the XRT59L91 device to operate in the clocked mode by simply applying a 2.048mhz clock signal to the txclk input pin. the XRT59L91 device contains detectioncircuitry that sense activity on the txclk line. if this circuit senses activity on the txclk line, then the XRT59L91 will automatically be operating in the clocked mode. in the clocked mode, a 2.048 mhz clock should be applied totxclk input pin and nrz data at the txpos and txneg input pins. the transmit input interface circuit will sample the data, at the txpos and txneg input pins, upon the falling edge of txclk, as illustrated below.
XRT59L91 9 rev. 1.0.0 tclk txpos txneg tsu tho figure 2. illustration on how the XRT59L91 device samples the data on the txpos and txneg input pins in general, if the XRT59L91 device samples a 1 on the txpos input pin, then the transmit section of the device will ultimately generate a positive polarity pulse via the ttip and tring output pins (across a 1:2 transformer). conversely, if the XRT59L91 device samples a 1 on the txneg input pin, then the transmit section of the device will ultimately generate a negative polarity pulse via the ttip and tring output pins (across a 1:2 transformer). 1.2.1 operating the transmitter in the clockless mode the user can configure the XRT59L91 device to oper- ate in the clockless mode by doing the following: l not applying a clock signal to the txclk input, and either pulling this pin to vdd or letting it float. l by applying rz (return to zero) data to the txpos and txneg input pins, as illustrated below. txpos txneg txclk data 1 1 0 1 1 0 1 bit period rz pulse width should conform to g.703 template no pulse is to be applied in the second half of the bit period no activity in txclk line figure 3. i ilustration on how the terminal equipment should apply data to the transmit sec- tion of the XRT59L91 device, when operating in the clockless mode
XRT59L91 10 rev. 1.0.0 figure 3, indicates that when the user is operating the XRT59L91 device in the clockless mode, then the terminal equipment must do the following. l not apply a signal on the txclk line. l when applying a pulse (to either the txpos or txneg input pin), apply an rz pulse to the appropriate input pin. this rz pulse should only have a width of one-half the bit-period. addition, the rz pulse should occupy only the first half of the bit-period. the txpos and txneg input pins must be at 0v, during the second half of every bit- period. 1.3 the pulse shaping circuit the purpose of the transmit pulse shaping circuit is to generate transmit output pulses that comply with the itu-t g.703 pulse template requirements for e1 applications. an illustration of the itu-t g.703 pulse template requirements is presented below in figure 4. 0% 50% v = 100% 244ns nominal pulse 219ns (244 - 25) 269ns (244 + 25) 194ns 10% 10% 20% figure 4. illustration of the itu-t g.703 pulse template for e1 application
XRT59L91 11 rev. 1.0.0 with input signal as described above, the XRT59L91 device will take each mark (which is provided to it via the transmit input interface block, and will generate a pulse that complies with the pulse template, presented in figure 4 (when measured on the secondary-side of the transmit output transformer). 1.2 interfacing the transmit section of the XRT59L91 device to the line itu-t g.703 specifies that the e1 line signal can be transmitted over coaxial cable and terminated with 75 w or transmitted over twisted-pair and terminated with 120 w . in both applications (e.g., 75 w or 120 w ), the user is advised to interface the transmitter to the line, in the manner as depicted in figures 5 and 6, respectively. figure 5. illustration of how to interface the transmit section of the XRT59L91 device to the line (for 75 w w w w w applications) u1 XRT59L91 ttip 13 tring 15 txpos 2 txneg 3 txclk 1 r1 9.1 1 2 r2 9.1 1 2 1:2 pe-65835 1 5 4 8 j1 bnc 1 2 txpos txneg txlineclk
XRT59L91 12 rev. 1.0.0 u1 XRT59L91 ttip 13 tring 15 txpos 2 txneg 3 txclk 1 1:2 pe-65835 15 48 r1 9.1 1 2 r2 9.1 1 2 ttip tring txpos txneg txlineclk figure 6. illustration of how to interface the transmit section of the XRT59L91 device to the line (for 120 w w w w w applications) notes: 1. figures 5 and 6 indicate that for both 75 w and 120 w applications, the user should connect a 9.1 w resistor, in series, between the ttip/tring outputs and the transformers. 2. figure 5 and 6 indicate that the user should a 1:2 step-up transformer.
XRT59L91 13 rev. 1.0.0 parameter value turns ratio 1:2 primary inductance isolation voltage leakage inductance transmit transformer recommendations part number vendor isolation package type pe-65835 pulse tti 7154-r transpower technologies, inc. tg26-1205 halo the following transformers are recommended for use: note: more transformers will be added to this list as we take the time to evaluate these transformers. magnetic supplier information pulse corporate office 12220 world trade drive san diego, ca 92128 tel: (619)-674-8100 fax: (619)-674-8262 europe 1 & 2 huxley road the surrey research park guildford, surrey gu2 5re united kingdom tel: 44-1483-401700 fax: 44-1483-401701 asia 150 kampong ampat #07-01/02 ka centre singapore 368324 tel: 65-287-8998 fax: 65-280-0080 transpower technologies corporate office 9410 prototype drive, ste #1 reno, nv 89511 tel: (800)511-7308 or (775)852-0140 fax: (775)852-0145 www.trans-power.com halo electronics halo electronics p.o. box 5826 redwood city, ca 94063 tel: (650)568-5800 fax: (650)568-6161
XRT59L91 14 rev. 1.0.0 2.0 the receive section the receive section of the XRT59L91 device consists of the following blocks: l the receive equalizer block l the peak detector and slicer block l the los detector block l the receive output interface block 2.1 interfacing the receive section to the line the design of the XRT59L91 device permits the user to transformer-couple or capacitive-couple the re- ceive section to the line. additionally, as mentioned earlier, the specification documents for e1 specify 75 w termination loads, when transmitting over coaxial cable, and 120 w loads, when transmitting over twisted- pair. figures 7 through 9 present the various methods that the user can employ in order to interface the receiver (of the XRT59L91 device) to the line. u1 XRT59L91 rtip 9 rring 10 rxpos 6 rxneg 7 rxlos 8 1:2 pe-65835 1 5 48 rl 18.7 1 2 j1 bnc 1 2 loss of signal rxneg rxpos figure 7. recommended schematic for interfacing the receive section of the XRT59L91 device to the line for 75 w w w w w applications (transformer-coupling)
XRT59L91 15 rev. 1.0.0 u1 XRT59L91 rtip 9 rring 10 rxpos 6 rxneg 7 rxlos 8 1:2 pe-65835 1 5 48 rl 30.1 1 2 rtip rring rxpos rxneg loss of signal figure 8. recommended schematic for interfacing the receive section of the XRT59L91 device to the line for 120 w w w w w applications (transformer-coupling) note: figures 7 and 8 indicate that the user should use a 2:1 step-down transformer, when interfacing the re ceiver to the line. u1 XRT59L91 rtip 9 rring 10 rxpos 6 rxneg 7 rxlos 8 c1 0.1uf 1 2 c2 0.1uf 1 2 r2 37.4 1 2 r1 37.4 1 2 rtip rring rxpos rxneg loss of signal figure 9. recommended schematic for interfacing the receive section of the XRT59L91 device to the line for 75 w w w w w applications (capacitive-coupling)
XRT59L91 16 rev. 1.0.0 2.2 the receive equalizer block after the XRT59L91 device has received the incoming line signal, via the rtip and rring input pins, the first block that this signal will pass through is the receive equalizer block. as the line signal is transmitted from a given transmit- ting terminal, the pulse shapes (at that location) are basically square. as this line signal travels from the transmitting terminal (via the coaxial cable or twisted pair) to the receiving terminal, it will be subjected to frequency-dependent loss. in other words, the higher frequency components of the signal will be subjected to a greater amount of attenuation than will the lower frequency components. if this line signal travels over reasonably long cable lengths, then the shape of the pulses (which were originally square) will be distorted and cause inter-symbol interference to increase. the purpose of this block is to equalize the incoming distorted signal, due to cable loss. in essence, the receive equalizer block accomplishes this by subject- ing the received line signal to frequency-dependent amplification (which attempts to counter the fre- quency-dependent loss that the line signal has experi- enced). by doing this, the receive equalizer is attempting to restore the shape of the line signal so that the received data can be recovered reliably. 2.3 the peak detector and slicer block after the incoming line signal has passed through the receive equalizer block, it will be routed to the slicer block. the purpose of the slicer block is to quantify a given bit-period (or symbol) within the incoming line signal as either a 1 or a 0. 2.4 the los detector block the los detector block, within the XRT59L91 was specifically designed to comply with the los decla- ration/clearance requirements per itu-t g.775. as a consequence, the XRT59L91 device will declare an los condition, (by driving the rxlos output pin high) if the received line signal amplitude drops to C 35db or below. further, the XRT59L91 device will clear the los condition if the signal amplitude rises back up to C12db or above. figure 10 presents an illustration of g.775 spec for declaring and clearing los. 0 db -6 db -9db -35db maximum cable loss for e1 los signal must be declared los signal must be cleared los signal may be cleared or declared figure 10. illustration of g.775 spec.
XRT59L91 17 rev. 1.0.0 timing requirements associated with declaring and clearing the los indicator. the XRT59L91 device was designed to meet the itu- t g.775 specification timing requirements for declar- ing and clearing the los indicator. in particular, the XRT59L91 device will declare los, between 10 and 255 ui (or e1 bit-periods) after the actual time the los condition occurred. further, the XRT59L91 device will actual occurrence of los condition line signal is restored time range for los declaration time range for los clearance g.775 compliance g.775 compliance 0 ui 10 ui 0 ui 10 ui 255 ui 255 ui rxin los output pin note: for e1, 1 ui = 488ns clear the los indicator within 10 to 255 ui after restoration of the incoming line signal. figure 11 illustrates the los declaration and clearance behav- ior, in response to first, the loss of signal event and then afterwards, the restoration of the signal. figure 11. the behavior of the los output indicator, in response to the loss of signal, and the restoration of the signal 2.5 the receive output interface block the purpose of the receive output interface block is to interface directly with the receiving terminal equipment. the receive output interface block outputs the data (which has been recovered from the incoming line signal) to the receive terminal equip- ment via the rxpos and rxneg output pins. if the receive section of the XRT59L91 device has received a positive-polarity pulse, via the rtip and rring input pins, then the receive output interface will output a pulse at the rxpos output pin. similarly, if the receive section of the XRT59L91 device has received a negative-polarity pulse, via the rtip and rring input pins, then the receive output interface will output a pulse at the rxneg output pin.
XRT59L91 18 rev. 1.0.0 3.0 diagnostic features in order to support diagnostic operations, the XRT59L91 supports the following loopback modes: l local loopback l remote loopback each of these loopback modes will be discussed below. 3.1 the local loop-back mode when the XRT59L91 device is configured to operate in the local loop-back mode, the XRT59L91 device will ignore any signals that are input to the rtip and rring input pins. the transmitting terminal equipment will transmit data (and clock, for clocked mode) into the XRT59L91 device via the txpos, txneg and txclk input pins. this data will be processed through the transmit terminal input inter- face and the pulse shaping circuit. finally, this data will be output to the line via the ttip and tring output pins. additionally, this data (which is being output via the ttip and tring output pins) will be looped back into the receive equalizer block. as a consequence, this data will also be processed through the entire receive section of the XRT59L91 device. after this post-loop- back data has been processed through the receive section it will output, to the near-end receiving terminal equipment via the rxpos and rxneg output pins. figure 12, illustrates the path that the data takes (within the XRT59L91 device), when the chip is config- ured to operate in the local loop-back mode. local loop back path transmit input interface pulse shaping circuit receive equalizer peak detector/ slicer receive output interface los detector local loop back mux remote loop back mux ttip tring txpos txneg rtip rring rloop lloop rxpos rxneg rxlos txclk figure 12. illustration of the local loop-back within the XRT59L91 device
XRT59L91 19 rev. 1.0.0 the user can configure the XRT59L91 device to oper- ate in the local loop-back mode, by pulling the lloop input pin (pin 4) to vdd. 3.2 the remote loop back mode when the XRT59L91 device is configured to operate in the remote loop-back mode, the XRT59L91 device will ignore any signals that are input to the txpos and txneg input pins. the XRT59L91 device will receive the incoming line signals, via the rtip and rring input pins. this data will be processed through the entire receive section (within the XRT59L91) and will output to the receive terminal equipment via the remote loop back path transmit input interface transmit input interface pulse shaping circuit pulse shaping circuit receive equalizer receive equalizer peak detector/ slicer peak detector/ slicer receive output interface receive output interface los detector los detector local loop back mux local loop back mux remote loop back mux remote loop back mux ttip tring txpos txneg rtip rring rloop lloop rxpos rxneg rxlos txclk rxpos and rxneg output pins. additionally, this data will also be internally looped back to the transmit input interface block within the transmit section. at this point, this data will be routed through the remainder of the transmit section of the XRT59L91 device and will be transmitted out onto the line via the ttip and tring output pins. figure 13, illustrates the path that the data takes (within the XRT59L91 device) when the chip is config- ured to operate in the remote loop-back mode. figure 13. illustration of the remote loop-back path, within the XRT59L91 device it should be noted that during remote loop-back operation, any data which is input via the rtip and rring input pins, will also be output to the terminal equipment, via the rxpos and rxneg output pins.
XRT59L91 20 rev. 1.0.0 4.0 shutting off the transmitter the XRT59L91 device permits the user to shut the transmit driver within the transmit section of the chip. this feature can be useful for system redundancy design considerations or during diagnostic testing. the user can activate this feature by either of the following ways. tclk txpos or tneg ttip/ tring t ho t su t 3 t r t f txpos or tneg ttip/ tring nrz mode (clock mode) rz mode (none-clock mode) t 3 t xpw txout v txout v t xpw t 2 t 1 method 1: connect the transmit data input pins (e.g., txpos and txneg) to a logic 1; or allow them to float. (these input pins have an internal pull-up resistor). method 2: connect the txclk input pin to a logic 0 (e.g., gnd) and continue to apply data via the txpos and txneg input pins. figure 14. transmit timing diagram
XRT59L91 21 rev. 1.0.0 rtip/ rring rxpos rxpw rpd rxneg rtr rtf figure 15. receive timing diagram applications information figures 16, 17 and 18, provide example schematics on how to interface the XRT59L91 device to the line, under the following conditions: l receiver is transformer-coupled to a 75 w unbalanced line. l receiver is transformer-coupled to a 120 w balanced line. l receiver is capacitive-coupled to a 75 w unbalanced line
XRT59L91 22 rev. 1.0.0 u1 XRT59L91 txpos 2 txneg 3 txclk 1 rxpos 6 rxneg 7 rxlos 8 rring 10 rtip 9 tring 15 ttip 13 r1 9.1 1 2 r2 9.1 1 2 1:2 pe-65835 1 5 4 8 j1 bnc 1 2 r3 18.7 1 2 1:2 pe-65835 1 5 4 8 j2 bnc 1 2 txpos txneg txlineclk rxpos rxneg loss of signal figure 16. illustration on how to interface the XRT59L91 device to the line (receiver is transformer-coupled to a 75 w w w w w unbalanced line)
XRT59L91 23 rev. 1.0.0 u1 XRT59L91 txpos 2 txneg 3 txclk 1 rxpos 6 rxneg 7 rxlos 8 rring 10 rtip 9 tring 15 ttip 13 1:2 pe-65835 1 5 4 8 1:2 pe-65835 1 5 4 8 r1 9.1 1 2 r2 9.1 1 2 r3 30.1 1 2 loss of signal rxneg rxpos txpos txneg txlineclk ttip tring rtip rring figure 17. illustration on how to interface the XRT59L91 device to the line (receiver is transformer-coupled to a 120 w w w w w balanced line)
XRT59L91 24 rev. 1.0.0 u1 XRT59L91 txpos 2 txneg 3 txclk 1 rxpos 6 rxneg 7 rxlos 8 rring 10 rtip 9 tring 15 ttip 13 r4 37.4 1 2 r1 9.1 1 2 r2 9.1 1 2 c1 0.1uf 1 2 c2 0.1uf 1 2 r3 37.4 1 2 1:2 pe-65835 1 5 4 8 j1 bnc 1 2 j2 bnc 1 2 txpos txneg txlineclk rxpos rxneg loss of signal figure 18. illustration on how to interface the XRT59L91 device to the line (receiver is capacitive-coupled to a 75 w w w w w unbalanced line)
XRT59L91 25 rev. 1.0.0
XRT59L91 26 rev. 1.0.0 notes
XRT59L91 27 rev. 1.0.0 notes
XRT59L91 28 rev. 1.0.0 notice exar corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. exar corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. charts and schedules contained here in are only for illustration purposes and may vary depending upon a users specific application. while the information in this publication has been carefully checked; no responsibility, however, is assumed for in accuracies. exar corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. products are not authorized for use in such applications unless exar corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of exar corporation is adequately protected under the circumstances. copyright 1999 exar corporation datasheet october 1999 reproduction, in part or whole, without the prior written consent of exar corporation is prohibited.

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